Forbes contributors publish independent expert analyses and insights. Marco Chiappetta is a technologist who covers semiconductors and AI. SiFive just announced an array of new additions to its ...
NextSilicon, a leader in next-generation computing solutions for AI and high-performance computing (HPC), today announced plans to productize its Arbel RISC-V core into a 64-core and a 128-core, ...
Join our daily and weekly newsletters for the latest updates and exclusive content on industry-leading AI coverage. Learn More Synopsys announced its plans for expanding its processor intellectual ...
The ability to effectively combine compute, AI, and graphics will become a key differentiator for platform competitiveness.
UBUNTU SUMMIT SpacemiT is demonstrating its impressive new K3 RISC-V SoC, a fairly hefty 16-core device – with a moderately ...
Physical AI is driving tighter integration of compute, software and process technology, and customers need a partner who can ...
Researchers point to a microprocessor on a space-ready motherboard used in spaceflight applications. SwRI is evaluating reduced instruction set computers (RISC-V or “risk five”) and Advanced RISC ...
[RetroBytes] nicely presents the curious history of the SPARC processor architecture. SPARC, short for Scalable Processor Architecture, defined some of the most commercially successful RISC processors ...
Use left and right arrow keys to seek audio. SiFive has just announced its new SiFive Performance P870-D, a new RISC-V processor with up to 256 cores, designed for data center applications. The new ...
TOKYO--(BUSINESS WIRE)--Renesas Electronics Corporation (TSE:6723), a premier supplier of advanced semiconductor solutions, announced today that it has designed and tested a 32-bit CPU core based on ...
In the roughly decade and a half since the Android mobile operating system appeared on the scene it has been primarily sold on devices with an ARM core at their heart, but along the way it has also ...
RISC-V is an open specification that allows an infinite number of implementations. But RISC-V goes beyond that and encourages processor architects to add new instructions to accelerate certain ...
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